1. Field of the Invention
The present invention relates to digital circuits and more particularly to memory devices.
2. Description of Related Art
Many computer systems utilize a dedicated memory chip, known as boot memory, to contain code to configure the computer on power-up. Flash memory devices are ideal for boot memory because they are non-volatile and re-programmable. When the basic input output system (BIOS) code for a computer is upgraded, the flash memory can be reprogrammed by the user utilizing either a floppy disk or a remote code change via a serial link.
Flash memories combine features that simplify programming, write protection and allow block erase. By combining the functions of several components in one, these devices make flash memory an innovative alternative to EPROM and EEPROM, or battery-backed static RAM.
BIOS contained within boot memory is typically constrained to one of two specific address ranges within the address space available. In order to maintain compatibility with a particular computer architecture, designers and developers in the computer industry create products in reliance on either of these address standards. The address standards basically involve the location of boot code at either the top or bottom of the memory map. Some microprocessors, identified as B-type microprocessors look to address 0 .sup.N hexadecimal for boot code on power-up. These microprocessors, are said to boot to the bottom of the memory map. Other microprocessors identified as T-type microprocessors boot to F .sup.N hexadecimal on power-up. These boot to the top of the memory map.
Typically, boot memory is divided into blocks with individual features. The boot block is the smallest of the blocks. The boot block contains the kernel code required to boot up a system. The boot block is hardware lockable to provide the most secure code storage location for the kernel required to boot up a system. Next, one or more parameter blocks are provided. The parameter blocks are intended to provide storage for frequently updated system parameters and configuration or diagnostic information. The parameter blocks can also be used to store additional boot or main code. The parameter blocks, however, do not have the hardware write protection feature that the boot block has. Finally, one or more main memory blocks are provided for the remaining BIOS.
Because there are not one but two industry standards for microprocessor boot addresses, and because the boot sector is physically different in size and lock capability from other sectors, memory manufacturers provide two similar boot memory chips, one for use with T-type microprocessors and the other for B-type microprocessors.
Intel.RTM. 28F001 flash memory family includes the 28F001BX-T and 28F001BX-B. The 28F400 BX-T device has the 16-Kilo byte (Kb) boot block located from 3E000h to 3FFFFh to accommodate those microprocessors that boot from the top of the address map, e.g., Intel's i486.TM., i386.TM., and 80186.TM. families. The 28F400 BX-B device has the 16-Kbyte boot block located from 00000h to 01FFFh to accommodate those microprocessors that boot from the bottom of the address map at 00000h. The 28F001BX-B memory map is tailored for bottom-boot devices such as Intel's MCS.RTM. 51, MCS.RTM. 96, 80960KX and 80960SX microcontrollers and processors.
In order to manufacture these two products, several methods are used. One of these is re-configure the array structure by changing design and layout which will create different product flows in the wafer fabrication process and enhance the complexity of production.
What is needed is a way to design a single chip to interface with either T-type or B-type microprocessors.